This invention relates to a semiconductor integrated circuit formed on an insulator substrate, in which the working characteristics or working speed of the integrated circuit and/or the large scale integration (LSI) has minimal temperature dependency, without resort to separately added temperature compensation circuits. It relates more particularly to a method and to a semiconductor integrated circuit formed on an insulator substrate in which the working speed or the propagation delay time and the power consumption are kept substantially constant independent of temperature variations by providing a threshold voltage for the load transistor in the integrated circuit in the range of about -2.8V to -1.0V.
An integrated circuit of the type which is formed on a substrate of bulk silicon or bulk germanium is well known. However, an integrated circuit of such type has the disadvantage that the working speed is sharply reduced at elevated temperature. Reduced working speed is the consequence of diminution of carrier mobility which occurs with increase in temperature. For example, in an integrated circuit forming an inverter circuit comprising an enhancement and depletion type integrated circuit (hereinafter referred to as the E/D type IC) in which a drive transistor is of an enhancement type while a load transistor is of a depletion type, higher working speed and larger output than presently available are required for many applications. Carrier mobility of the load transistor is of vital importance in achieving this end, although carrier mobility of the drive transistor may be disregarded.
Generally, the working characteristics of the E/D type IC formed on the bulk substrate relative to temperature is represented by the following equation: ##EQU1## wherein T stands for time, t.sub.pd stands for working speed or propagation delay time, V.sub.TD is a threshold voltage of the load transistor and .mu..sub.eff denotes effective mobility in equation (1). To reduce temperature dependency of the propagation delay time tpd to zero ##EQU2##
In the E/D type IC formed on a bulk substrate, the temperature dependency of the effective mobility .mu..sub.eff of the carrier is quite high as hereinbefore noted. Hence, temperature compensation effect will not be obtained by suitable selection of the threshold voltage V.sub.TD in relation to the effective mobility .mu..sub.eff because as will be apparent from equation (2), the desired temperature compensation effect cannot be obtained in such E/D type integrated circuit unless the threshold voltage is set at values which are difficult if not impossible to attain for the integrated circuit.
The temperature characteristics of MOS transistors have been analyzed by O. Leistiko et al. ["Electron and Hole Mobilities in Inversion Layers on Thermally Oxidized Silicon Surfaces", IEEE Trans ED, ED-12 Vol., 5, p 248 (May, 1965)]and L. Vadasz et al. ["Temperature Dependent of MOS Transistor Characteristics Below Saturation", IEEE Trans. ED, ED-13, Vol., 12, p 863 (Dec., 1966)]and it has been ascertained that the temperature dependency of carrier mobility and the temperature variation of Fermi level influence both the transfer conductance and the threshold voltage of the transistor as well as resultant saturation current thereof.
A typical method of forming a MOS transistor on the monocrystal insulator substrate of sapphire is disclosed in "N-N channel Si-Gate MOS Devices on Sapphire Substrate", Proceedings of the Sixth Conference on Solid State Devices,
Tokyo, 1974 (Supplement to the Journal of the Japan Society of Applied Physics, Vol. 44, 1975, pp 225-231) Hiroyuki Tango, Jun Iwamura, Kenji Maeguchi and Mitsuo Isobe.
Further, the effect of temperature variations on the pulse characteristics of two kinds of inverters, namely (a) an inverter of basic digital MOS-IC form, i.e. an inverter with a load transistor of the drain-earthed MOS type in which the gate and the drain are electrically connected, and (b) an inverter with a source-earthed load transistor has been reported by Y. Hayashi and Y. Tarui ["Temperature Characteristics of ED-MOS-IC", Meeting of Semiconductor and Transistor Group of Institute of Electronics and Communication Engineers of Japan, April SSD-71-4 (1971-04 in Japan)]. Particularly, this report refers to the temperature dependency of the propagation delay time of IC in which an MOS transistor, formed on a bulk silicon substrate, is used as a depletion type load transistor.
After extensive research and experiments on the temperature characteristics of an integrated circuit of the E/D type formed on an insulator substrate instead of on the bulk substrate of the prior art, we have ascertained that the temperature dependency of the delay time t.sub.pd or the working speed can readily be reduced to zero, this being impossible with an integrated circuit formed on a conventional bulk substrate for reasons aforementioned, i.e. the threshold voltage cannot be set to the very low values for such E/D type IC formed on a bulk substrate.
In general, we utilize sapphire, spinel, polycrystal silicon (poly Si), glass, quartz and crystal as insulator substrates in a semiconductor integrated circuit, and preferably we use a SOS device comprising a monocrystal of silicon grown by the CVD technique (chemical vapor deposition) on a substrate of sapphire. For purpose of disclosure, the invention will be described with respect to an SOS device although, as will be apparent from the disclosure to follow the invention is not thus restricted.
Measurements of the temperature dependency of the threshold voltage V.sub.TD and of the effective mobility .mu..sub.eff of the depletion type transistors of the preferred SOS device within the range of -60.degree. to 150.degree. C. and measurements of the temperature dependency of propagation delay time t.sub.pd in the working speed and comparing said measurements with corresponding calculated values shows that the delay time t.sub.pd scarcely varies with variation in the temperature in the range of -2.8V to -1.0V.
Moreover, measurement of the temperature dependency on mean power consumption P.sub.d of the depletion type transistors comprising the SOS device of the invention, has shown negligible temperature dependency within the recited threshold voltage range.